Taiwan Semiconductor Manufacturing Co. is accelerating 2-nanometer capacity plans, with trade press citing internal targets of roughly 120,000 wafers per month by late 2026, above earlier forecasts in the 90,000-to-100,000 range. Five fabrication lines—two in Hsinchu and three in Kaohsiung—are scheduled to contribute wafers this year as Apple, Nvidia, AMD, Qualcomm, and MediaTek lift orders by an estimated 10 to 20 percent, according to reports attributed to supply-chain sources.
Why the revision matters locally
For Taiwan’s economy, advanced-node capacity is both export revenue and power demand. Each new 2nm tranche requires upgraded water recycling and substation work that city governments in Hsinchu and Kaohsiung have been negotiating under science-park expansion rules. Equipment installers said lead times for extreme ultraviolet lithography tools remain the gating item, not concrete shells.
Senior vice president Hou Yung-ching was quoted saying first-year 2nm output would run 45 percent above the first-year volume of the 3nm node in 2023, a comparison investors use to gauge how quickly utilisation ramps.
Customer mix
AI accelerators dominate the narrative, but smartphone SoC tape-outs still anchor baseline loads. MediaTek’s record share price last week reflected optimism that dual sourcing at 2nm will not be limited to a single North American handset brand. Server CPU projects from AMD and custom chips for cloud hyperscalers fill the remaining slots, according to equipment vendors speaking on background.
Competitive context
Samsung and Intel continue to market rival nodes, yet TSMC’s revision signals confidence that Taiwan-based manufacturing remains the default for cutting-edge designs. Any slip in ramp timing would ripple through local substrate, packaging, and testing houses clustered around Taichung and Kaohsiung harbors.
Power and talent
Science park administrators are pairing fab permits with dormitory and transit upgrades to keep night-shift engineers on site. Water agency officials said reclaimed industrial water must rise as a share of fab intake before the fifth line hits full load.
Investor takeaway
The story is not a single headline number but the slope of capacity through 2028, when reports cite a compound 70 percent annual growth target for 2nm output. Equity researchers said they will reconcile the 120,000 figure with capex guidance on TSMC’s next earnings call; until then, local suppliers are booking component orders as if the higher band is already policy.
Packaging houses in Taichung said substrate lead times, not lithography, could still cap shipped systems even if wafer starts hit the reported 120,000 monthly band.