Researchers co-led by National Taiwan University professor Chou Yi-chia published results on a boron-carbon-nitrogen monolayer that conducts through holes rather than electrons, a p-type gap that has slowed two-dimensional transistor roadmaps for years.
The group, including Academia Sinica's Research Center for Applied Sciences and collaborators at the University of Tokyo, substituted carbon into a boron-nitride lattice to tune band structure. They report hole mobility around 100 square centimeters per volt-second and on-off current ratios near 10⁸ on prototype top-gated devices fabricated across three batches totaling 224 transistors with consistent thresholds.
Why p-type matters for 2D stacks
Most excitement around two-dimensional semiconductors has centered on n-type molybdenum disulfide or tungsten disulfide for aggressive gate lengths. Without a matching p-type partner, CMOS-style circuits still require awkward junctions or heavy doping that defeats atom-thin benefits. A wafer-scale p-type film lets designers pair n- and p-devices on the same insulator stack, which is the prerequisite for any serious logic demo beyond single transistors.
Academia Sinica seminars on November 6 detailed a parallel manufacturing path: programmable precursor chemistry that grows aligned tungsten disulfide monolayers with release layers for water delamination, preserving mobility above 100 square centimeters per volt-second after transfer. The BCN work tackles the complementary half of that platform.
Manufacturing scale, not just lab hero devices
Two-inch wafers are tiny compared with 300-millimeter silicon lines, yet they are large for direct-grown 2D films. The team controlled competing reaction pathways between two precursors to keep islands from nucleating randomly on sapphire and amorphous dielectrics. That interface discipline is what allows batch statistics instead of one-off hero devices.
Taiwan's industrial policy context adds weight. As TSMC pushes advanced packaging and explores beyond-silicon research partnerships, domestic publications on scalable 2D growth give local universities bargaining power in consortium funding calls without pretending an immediate foundry swap.
Distance to a product line
No mobile processor will use BCN channels next quarter. Defect maps, contact resistance, and high-volume precursor supply remain open engineering tasks. Still, demonstrating reproducible p-type arrays on wafers moves the field from materials papers toward process integration questions fabs understand — lithography alignment, gate metals, and yield monitoring.
For students watching Taiwan's hardware talent pipeline, the result is also institutional: six Academia Sinica researchers received National Science and Technology Council Ta-You Wu Memorial Awards on November 3, signaling continued public funding for long-horizon materials even while public markets punish short-term AI trades.
Industry liaisons said foundries may invite the group to benchmark contact resistance on packaged dies as a next collaboration step.